CareerPlan

Panel Packaging Technology Enablement Director

Santa Clara,CAFull-time$176k–$242k2026-10-16 → 2026-10-23

Core

Leads the development and validation of panel process solutions for AI accelerators and high-performance computing, spanning core substrate formation through build-up and interconnect.

Role type

Director, Panel Packaging Technology Enablement

Builds

Panel-level packaging solutions for AI and HPC

Domain

Semiconductor manufacturing / Advanced packaging

Required skills

Advanced packaging integration (2.5D/3D, fan-out, build-up), process development (PVD, plating, etch, lithography), DOE and statistical analysis, team leadership, customer negotiation, patent generation

Preferred skills

Panel-format processing (glass core, TGV, fine-line RDL), AI accelerator/HPC architecture knowledge, Asia-Pacific ecosystem relationships, JDA management

Technologies

PVD, plating, etch, lithography, dielectric processes, through-glass vias, fine-line RDL

Responsibilities

Define and execute panel technology enablement roadmap; lead complex integration programs from concept to customer transfer; serve as primary technical lead for strategic customers; build and manage strategic partnerships with ecosystem partners; lead and develop a multidisciplinary engineering team

Seniority

Director, strategic leadership & team management