系统架构工程师（低功耗方向/存算与AI） - 芯片研发
Core
Design high-efficiency AI chips based on in-memory computing architecture to break the 'memory wall' bottleneck and provide a high-efficiency computing base for AI large models.
Role type
Senior IC system architecture engineer (low-power, in-memory computing)
Builds
High-efficiency AI chips for large model applications
Domain
Semiconductor / AI Hardware
Deliverable
production ML models
Required skills
Low-power chip architecture, power consumption evaluation, competitive analysis, system-level power budgeting, front/mid/back-end collaboration, tape-out and mass production testing planning
Preferred skills
Patent application experience, cross-team collaboration with process and test teams
Technologies
In-memory computing architecture, Von Neumann architecture (context), chip design flow
Responsibilities
Conduct chip and system power consumption evaluation and competitive analysis; Define and allocate power targets for chip subsystems based on target work scenarios; Collaborate with process, production, and test teams to establish power testing plans and wafer screening standards for tape-out and mass production
Seniority
Senior, hands-on IC
