CPU Subsystem Development
Core
Lead the development, architecture definition, specification, design, and verification of CPU subsystems (CPUSS) for next-generation microcontrollers, focusing on performance, power, and area optimization.
Role type
Senior IC CPU subsystem architect and verification lead
Builds
CPU cores, caches, memory protection mechanisms, debug/trace features, interrupt controllers, and bus interfaces for microcontrollers and SoCs
Domain
Semiconductor / Embedded Systems / CPU Architecture
Required skills
Logic design, functional verification, CPU architecture knowledge, RTL design, project leadership, functional safety, security features
Preferred skills
Logic synthesis, non-functional verification (CDC, RDC, DFT), timing verification, physical design, backend implementation, cross-disciplinary collaboration
Technologies
RTL, CPU cores, caches, interrupt controllers, bus interfaces, DFT, CDC, RDC
Responsibilities
Drive architecture definition and specification development, lead RTL design and verification strategies, optimize for performance/power/area, evaluate new technologies and methodologies, collaborate with global teams and external partners
Seniority
Senior, hands-on IC with leadership responsibilities
