Sr EDA Engineer
Core
Support RTL-to-Gates implementation, static verification, and signoff activities for semiconductor chip development projects.
Role type
Senior IC EDA Engineer (Implementation/Signoff)
Builds
Production implementation flows and infrastructure using Synopsys tools
Domain
Semiconductor / Digital IC Design
Required skills
RTL-to-Gates implementation, Static timing analysis, Power analysis, Tcl scripting, Python scripting, Linux/Unix debugging, Flow automation, Version control
Preferred skills
SDC development, Clocking strategies, Low-power design (UPF/CPF), Large-scale SoC implementation, QoR trade-off analysis
Technologies
Synopsys, Tcl, Python, Perl, Shell, Linux, Unix
Responsibilities
Run project designs and review results for timing/power/area issues, Debug flow issues involving tools/scripts/constraints, Develop and maintain flow infrastructure, Collaborate with global teams to share working methods, Support migration to next-generation implementation platforms
Seniority
Senior, hands-on IC
