Principal Chip Lead
Core
Design, verification, test, and validation of power management ICs supplying power to advanced computing platforms.
Role type
Principal Mixed-Signal SOC Engineer (Infrastructure Power)
Builds
High-performance digital power VRMs, multiphase controllers, Smart Power Stages, Vertical Power Stages, Power Towers, and power MOSFETs.
Domain
Semiconductor / Power Electronics / Mixed-Signal SoC
Required skills
Mixed-Signal SOC design, Analog & mixed-signal design, RTL & digital design, Design verification, System-level design/architecture, Root cause analysis, Cross-functional collaboration, Mentorship, Continuous improvement in design methodologies, Automated bench testing, Silicon/system validation, Complex system reasoning, Technical skill acquisition across disciplines.
Preferred skills
Experience with firmware, behavioral modeling of analog and mixed-signal circuits, Use of tracking systems for development milestones.
Technologies
Power MOSFETs, VRMs, multiphase controllers, Smart Power Stages, Vertical Power Stages, Power Towers, simulation, formal methods, DV methodology.
Responsibilities
Own the full design cycle from product definition to volume production and sustaining support; Lead cross-functional collaboration to define requirements and drive technical decisions; Perform root cause analysis on field issues; Contribute to system-level architecture and design reviews; Mentor junior engineers; Drive continuous improvement in design and verification strategies.
Seniority
Principal, hands-on IC with mentorship responsibilities.
