メモリレイアウト技術リーダー
Core
Lead layout design for mixed-signal non-volatile memory IP (Flash, MRAM, ReRAM) targeting automotive, industrial, and IoT MCUs.
Role type
Senior IC memory layout design leader
Builds
Non-volatile memory IP cells and MCU products optimized for Performance/Power/Area (PPA)
Domain
Semiconductor / Memory / Automotive & Industrial IoT
Deliverable
production ML models | product features
Required skills
Non-volatile memory hand layout design, Layout strategy planning, Layout design and verification leadership, Cross-functional agreement with circuit designers, Global collaboration with overseas partners
Preferred skills
P&R design, Analog circuit design, AI-assisted layout design
Technologies
Flash, MRAM, ReRAM, MCU, ISSISS, VLSI Circuits, IEDM
Responsibilities
Formulate layout strategies from IP and circuit specifications, Lead layout design and verification tasks, Collaborate with global memory development teams
Seniority
Senior, hands-on IC leader
