CareerPlan

Memory Layout Technical Lead

Kodaira, jpFull-time2026-10-16 → 2026-11-10

Core

Lead layout design for non-volatile memory (NVM) IP including Flash, MRAM, and ReRAM for MCUs targeting automotive, industrial, and IoT applications.

Role type

Senior IC memory layout technical lead

Builds

Embedded NVM IP for high-volume MCU products

Domain

Semiconductor / Embedded Memory / VLSI Design

Required skills

full-custom layout design, PPA optimization, circuit specification interpretation, layout review leadership, cross-functional collaboration, English technical communication

Preferred skills

P&R design, analog circuit design, AI-assisted layout design

Technologies

Flash, MRAM, ReRAM, NVM IP, MCU

Responsibilities

Develop layout strategies based on IP requirements and circuit specifications, lead hands-on layout design and verification activities, build consensus with circuit designers, collaborate with global NVM development teams

Seniority

Senior, hands-on IC