Sr Staff Digital Engineer
Core
Architect, design, integrate, and implement advanced digital and mixed-signal ICs and SoCs for automotive, industrial, and IoT applications.
Role type
Sr Staff Digital Design Engineer (SoC)
Builds
Complex mixed-signal and digital SoC products for automotive, industrial, infrastructure, and IoT markets (via careerplan.io/jobs/744000153527410-sr-staff-digital-engineer-at-renesas-electronics)
Domain
Semiconductor / Digital IC Design / SoC Architecture
Required skills
Digital IC and SoC architecture, RTL development (Verilog/SystemVerilog), SoC integration, Design signoff, Multi-clock design, Low-power design, Embedded memory architectures, ASIC/SoC development flow, Silicon debug and characterization
Preferred skills
Mixed-signal IC development, EDA tools (Synopsys/Cadence), Arm processor subsystems integration, High-speed interface design, FPGA prototyping
Technologies
Verilog, SystemVerilog, AHB, APB, AXI, USB, I2C, SPI, UART, SRAM, OTP, MTP, Flash, Synopsys Design Compiler, PrimeTime, SpyGlass, Cadence
Responsibilities
Define digital architecture and micro-architecture for complex SoC products; Develop high-quality RTL and participate in design reviews; Drive SoC and subsystem integration including internal bus architectures; Develop and validate timing constraints, synthesis scripts, and implementation flows; Analyze and resolve CDC, RDC, Lint, and timing issues; Collaborate with verification teams on test planning and debugging; Support DFT implementation including scan and production test methodologies; Work with physical design teams to achieve power, performance, and area goals; Perform silicon bring-up, debug, and root-cause analysis; Contribute to technology and architecture definition for future product generations
Seniority
Sr Staff, hands-on IC design with strategic architecture input
