Design Verification Engineer（SoC機能検証エンジニア）(1)
Core
Design Verification Engineer responsible for functional verification of SoC products for industrial equipment and physical AI, ensuring quality and reliability from IP to SoC level.
Role type
Design Verification Engineer (SoC)
Builds
Next-generation physical AI SoCs for robotics, machine vision, and autonomous control systems
Domain
Semiconductor / SoC Design / Physical AI
Deliverable
production ML models
Required skills
SystemVerilog, UVM, digital circuit verification, SoC verification, IP verification, simulation-based debugging, verification planning, coverage closure
Preferred skills
Formal Verification (JasperGold, VC Formal), Arm CPU subsystem verification, AMBA bus architecture verification, Camera Interface (MIPI CSI-2) verification, Graphics/Vision AI/Accelerator verification, regression management
Technologies
SystemVerilog, UVM, Specman, Cadence JasperGold, Synopsys VC Formal, Arm CPU, AMBA Bus, MIPI CSI-2
Responsibilities
Develop verification plans and define test items; build verification environments; execute functional verification for CPU subsystems, image input systems, and AI accelerators; drive coverage closure using Functional and Code Coverage; collaborate with RTL, physical design, and software teams
Seniority
Mid-Senior, hands-on IC
