HPC DDR Controller Design Engineer / Leader
Core
Design and lead the DDR memory subsystem for automotive SoCs (R-Car series), focusing on controller architecture, RTL design, verification, and performance evaluation.
Role type
Senior IC HPC DDR Controller Design Engineer / Leader
Builds
High-performance automotive SoCs (R-Car series) with integrated DDR memory subsystems
Domain
Automotive semiconductor / SoC IP development
Deliverable
production ML models | product features
Required skills
Digital circuit design, RTL design, verification, debugging, specification analysis, memory controller design, data transfer control, cross-functional collaboration, technical leadership, consensus building
Preferred skills
DDR/LPDDR memory controller design, AXI bus, QoS control, cache coherence, DMA, memory performance analysis, UVM, formal verification, power separation design, physical design (P&R), automotive SoC development, functional safety, JEDEC DDR/LPDDR standards
Technologies
R-Car series, RTL, UVM, AXI, DDR, LPDDR, JEDEC standards
Responsibilities
Define specifications and micro-architecture for DDR memory controllers; perform RTL design, verification, debugging, and performance evaluation; collaborate with PHY, interconnect, CPU, and software teams; lead design reviews and technical problem-solving; manage external IP integration and vendor coordination; coordinate with global design centers in Japan, India, and Vietnam
Seniority
Senior, hands-on IC with leadership potential
