HPC SoC Interconnect Design Engineer / Leader
Core
Design and lead SoC bus and interconnect architectures for automotive SoCs (R-Car series), ensuring performance, quality, and integration of CPU, memory, AI, and high-speed interfaces.
Role type
Senior IC SoC Interconnect Design Engineer / Leader
Builds
Automotive SoCs (R-Car series) integrating CPU, memory, AI/video, and security IP
Domain
Automotive semiconductor / SoC design
Deliverable
production ML models | product features
Required skills
RTL design, verification, debugging, specification analysis, deadlock avoidance, error handling, traffic modeling, performance evaluation, cross-functional collaboration, global team communication
Preferred skills
AMBA AXI/ACE/CHI protocols, NoC architecture, QoS and bandwidth control, address mapping, security/access control, cache coherence, memory subsystems, DMA, power isolation design, physical design (P&R), automotive functional safety experience, external IP integration
Technologies
RTL, AXI, ACE, CHI, NoC, R-Car series
Responsibilities
Define specifications and architecture for on-chip buses and NoC; design connections for CPU, memory, AI/image processing, and high-speed interfaces; analyze bottlenecks using traffic models and performance results; lead design reviews and technical discussions; integrate external IP and manage vendor constraints; collaborate with design centers in Japan, India, and Vietnam
Seniority
Senior, hands-on IC with leadership potential
