Principal Engineer, SoC Verification
Core
Lead verification of power efficient IPs, Chiplets, and Chips to meet functional and performance targets, including post-silicon debug and test-plan development.
Role type
Principal SoC Verification Engineer
Builds
Power efficient IPs, Chiplets, and Chips for automotive, industrial, infrastructure, and IoT applications
Domain
Semiconductor hardware verification (SoC, Microcontrollers, Microprocessors)
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
UVM, constrained random verification, System-Verilog, Verilog, VHDL, formal verification, regression frameworks, FPGA, low power verification (UPF), protocol verification (AHB/AXI/CHI, DDR, PCIe, Ethernet), virtual prototype tools
Preferred skills
High speed peripherals (GPU, VPU, NIC/FlexNOC), Flash memory subsystems, clocking and power management domains
Technologies
Cadence Xcelium, eManager, vManager, ARM Fast Models, Synopsys Virtualizer, Windriver SIMICS
Responsibilities
Lead verification of power efficient IPs, Chiplets and Chips; Manage verification team and timelines; Develop and review test plans; Support post silicon debug; Design verification systems and hardware/software partitioning; Optimize solutions for reusability and performance
Seniority
Principal, hands-on IC with team leadership
