Principal Analog Engineer
Core
Define and drive the process roadmap for Intelligent Power Devices (IPD) to enable optimal process development for robust, scalable, and reliable product releases.
Role type
Principal Analog Engineer (Wafer Process Development)
Builds
Wafer processes for IPD product lines (Power MOS, FETs) for automotive, industrial, and IoT applications
Domain
Semiconductor manufacturing, Power Electronics, Automotive electronics
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Wafer process development, Power MOS structure and characteristics, Power MOS driving methods, Fault cases and loading analysis, Reliability and safety standards (AEC-Q100/012, ISO 26262), Target specification determination (EAS, IAS, TSOA), Root cause analysis, Risk identification and mitigation, Team mentorship
Preferred skills
CMOS process, TCAD, EMC/ESD, Package technology, Semiconductor physics, Thermal design
Technologies
AEC-Q100, ISO 26262, TCAD
Responsibilities
Own end-to-end delivery of wafer process development, Define product group process roadmap, Understand mid to long-term wafer process roadmap, Drive development in collaboration with process development team, Support wafer process evaluation and failure resolution, Manage development schedule, cost, and risk, Mentor and develop less-experienced team members
Seniority
Principal, technical leader & mentorship
