Staff Digital Design Engineer
Core
Design optimized digital blocks for ASIC/IC chips ensuring functional, cost, and low-power constraints while managing the full design flow from synthesis to post-layout verification.
Role type
Staff Digital Design Engineer (ASIC/IC)
Builds
Digital logic blocks and integrated circuits for automotive, industrial, infrastructure, and IoT applications
Domain
Semiconductor / Embedded Systems / Digital IC Design
Deliverable
production ML models | product features | infrastructure
Required skills
RTL coding (Verilog), Static Timing Analysis (STA), Synthesis, Logic Equivalence Checking, Post-layout verification, P&R handoff, DFT concepts, FPGA prototyping, Physical silicon device evaluation
Preferred skills
DFT expertise, Physical design experience, Lab equipment operation
Technologies
Verilog, Synopsys/Cadence tools (implied by STA/Synthesis), FPGA platforms
Responsibilities
Design digital blocks meeting functional and power constraints; Perform synthesis, STA, and logic equivalence checking; Interface with P&R for handoff and post-layout verification; Collaborate with analog and test engineers on testability; Work with Application/GUI teams on FPGA prototypes and lab debugging; Evaluate physical silicon devices
Seniority
Staff, hands-on IC design with deep flow expertise