Next-gen Automotive SOC/MCU Test technology development Engineer
Core
Developing common test infrastructure and standardization for next-gen automotive SoC/MCU products (3nm SoC, MRAM) to improve cost, quality, and time-to-market.
Role type
Senior IC test technology development engineer
Builds
Reusable test design assets, standard specifications, and reference flows for automotive semiconductor products
Domain
Automotive semiconductor / Digital design for test (DFT)
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> infrastructure (test infrastructure & design assets)
Required skills
DFT (digital) design, Test strategy formulation, Test mechanism conception to mass production, Cross-functional collaboration, Japanese (communication level), English (listening level)
Preferred skills
Test planning, DFT design (SCAN, MBIST, ATPG), HDL (Verilog, VHDL), Test EDA tools (Siemens, Synopsys, Cadence)
Technologies
3nm SoC, MRAM, SCAN, MBIST, ATPG, Verilog, VHDL, Siemens, Synopsys, Cadence
Responsibilities
Own common test infrastructure development and standardization; Formulate and execute test strategies for automotive SoC/MCU; Collaborate with product and design teams to apply test technologies; Establish standard test environments across design, quality, and global sites
Seniority
Senior, hands-on IC
