Senior FPGA/Emulation Validation Engineer
Core
Design verification, debugging, and system integration for SOC architecture using FPGA and emulation platforms to achieve pre-silicon goals.
Role type
Senior IC FPGA/Emulation Validation Engineer
Builds
Pre-silicon emulation and prototyping environments for SOC ASIC designs
Domain
Semiconductor hardware security, AI infrastructure, cloud datacenters, 5G
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
FPGA platform expertise, emulation platform expertise, SOC architecture knowledge, Vivado tool proficiency, protocol familiarity (PCIe, USB, Ethernet, SPI), firmware/software on SOC understanding
Preferred skills
BS or MS in EE/EECS/CS
Technologies
Vivado, FPGA tools, emulation platforms
Responsibilities
Set up FPGA/emulation platforms and device modeling, configure debugging tools, customize SOC designs for emulation, create and run validation tests, support software debugging
Seniority
Senior, hands-on IC
