Senior/Principal Signal Integrity Engineer-Silicon Photonics & AI Interconnects
Core
Lead end-to-end signal integrity (SI) and power delivery analysis for complex 2.5D/3D photonic-electronic packages integrating electrical ICs, photonic ICs, and chiplets.
Role type
Senior/Principal Signal Integrity Engineer (Silicon Photonics & AI Interconnects)
Builds
High-speed optical interconnects and photonic engines for AI supercomputing
Domain
Silicon Photonics, AI Infrastructure, Advanced Packaging
Deliverable
production ML models
Required skills
High-speed SerDes (≥56G/100G/200G PAM4), EM modeling and simulation, 2.5D/3D packaging design, time-domain transient simulation, high-frequency measurement correlation, Python/TCL scripting, cross-functional architectural leadership
Preferred skills
Power integrity co-simulation, emerging substrates (glass core), chiplet standards (UCIe), EMI/EMC considerations
Technologies
Ansys HFSS, SIwave, Clarity, CST, Keysight ADS, HSPICE, HyperLynx, VNA, TDR, BERT
Responsibilities
Perform EM modeling of silicon interposers and 2.5D/3D stacks; Conduct high-speed channel analysis for SerDes and hybrid interconnects; Optimize package stack-ups and routing to minimize loss and crosstalk; Collaborate on die-to-package co-design and floorplanning; Execute pre/post-layout SI simulations and correlate with lab measurements; Establish SI design rules for photonic-integrated systems; Partner on concurrent SI/PI analysis including SSO and PDN resonance
Seniority
Principal, hands-on IC with architectural influence
