Staff Wafer-level Testing Engineer (Operations & Process)
Core
Own and optimize wafer-level test processes, operations, and yield for photonic and electrical chip production.
Role type
Staff IC manufacturing process engineer (wafer-level testing)
Builds
Wafer-level test flows, automated test equipment setups, and production-ready photonic/electronic chips
Domain
Semiconductor manufacturing / Silicon photonics
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Wafer-level test process ownership, automated wafer prober operation, ATE setup and qualification, yield management, statistical process control (SPC), root-cause analysis, DOE, Six Sigma, data analysis (JMP, Python, R), cross-functional project management
Preferred skills
Silicon photonics, optical devices, advanced semiconductor packaging
Technologies
Automated Test Equipment (ATE), wafer probers, optical alignment systems, JMP, Spotfire, Python, R
Responsibilities
Lead setup and operation of automated wafer probers and ATE; develop and qualify test flows and process parameters; monitor production performance and yield; analyze test data to identify trends and failures; drive cycle time and productivity improvements; maintain process documentation and control plans; collaborate with engineering and supply chain teams for production ramp.
Seniority
Staff, hands-on IC with strategic process ownership
