Senior Engineer STPG Product Engineering - Probe
Core
Define probe coverage intent, establish limits and guard-bands, and drive yield, quality, and test-cost outcomes across the product lifecycle from pre-silicon design to high-volume manufacturing.
Role type
Senior IC product engineer (probe strategy & silicon learning)
Builds
Probe test flows, coverage strategies, and yield optimization solutions for semiconductor memory and storage products
Domain
Semiconductor manufacturing (wafer test, DFT, device characterization)
Deliverable
production ML models
Required skills
Semiconductor device physics, wafer test strategy, DFT architecture, silicon characterization, yield analysis, root-cause analysis, data analytics, AI/ML application
Preferred skills
Experience with advanced technology nodes, predictive probe, smart sampling, test optimization
Technologies
Engineering probe platforms, lab-based characterization setups, AI/ML tools for test optimization
Responsibilities
Define and own probe coverage intent by mapping design features and process risks; Establish probe limits and guard-bands based on silicon characterization; Lead probe enablement for new product introductions and technology ramps; Perform silicon and device-level characterization to inform probe strategies; Drive wafer-level yield learning and failure-mode analysis; Contribute to AI/ML initiatives for predictive probe and test optimization
Seniority
Senior, hands-on IC
