Senior Logic Design Engineer
Core
Design and optimize high-performance digital logic for next-generation FPGA and ASIC-based control platforms serving quantum computing systems.
Role type
Senior IC logic design engineer (FPGA/ASIC)
Builds
High-performance FPGA and ASIC control platforms for quantum computing
Domain
Quantum computing + digital logic design
Required skills
RTL development (SystemVerilog), digital logic design, computer architecture, logic synthesis, static timing analysis (STA), FPGA/ASIC implementation workflows, clock-domain crossing (CDC), hardware-software interfaces, simulation-based verification
Preferred skills
AMD/Xilinx FPGA platforms (Versal), AMD Vivado, Synopsys VCS/Siemens Questa, digital signal processing (DSP), deterministic ultra-low-latency systems, AXI/PCIe/DDR interfaces, ASIC reusable IP, Python/Tcl automation, hardware-software co-design
Technologies
SystemVerilog, SystemVerilog, AMD Vivado, Synopsys VCS, Siemens Questa, Python, Tcl
Responsibilities
Design and implement configurable low-latency RTL modules; Develop digital logic for signal processing and real-time control; Participate in RTL development lifecycle from architecture to verification; Optimize designs for timing, latency, and power; Perform logic synthesis and timing analysis; Collaborate on functional correctness and test coverage; Analyze requirements and implement hardware-software interfaces; Integrate proprietary digital IP into architectures
Seniority
Senior, hands-on IC
