Senior Staff Engineer Design
Core
Verify next-generation WLAN MAC digital designs and subsystems for industry-leading semiconductor products.
Role type
Senior Staff Engineer, Digital Design Verification (WLAN MAC)
Builds
WLAN MAC verification environments, testbenches, and verification IPs (VIPs) for AMBA and PCIe protocols.
Domain
Semiconductor / Wireless Communication (WLAN)
Required skills
SystemVerilog, UVM, WLAN MAC verification, AMBA protocols, PCIe, CDC/RDC analysis, coverage-driven verification, EDA tools (Synopsys/Cadence/Siemens), IEEE 802.11 standards
Preferred skills
None stated
Technologies
SystemVerilog, UVM, AMBA, PCIe, Synopsys, Cadence, Siemens EDA
Responsibilities
Develop and execute verification plans for WLAN MAC designs; Build and maintain SystemVerilog/UVM verification environments; Create test plans, test cases, and verification documentation; Develop and integrate Verification IPs (VIPs) for AMBA and PCIe; Drive functional, code, assertion, and coverage closure activities; Run regressions, debug simulation failures, and perform root-cause analysis; Conduct CDC/RDC verification and support gate-level simulation; Collaborate with design, architecture, and software teams; Present verification results and technical reports; Mentor junior engineers
Seniority
Senior Staff, hands-on IC
