Working Student - Digital Functional Verification (f/m/div)
Core
Support verification team in exploring and applying cutting-edge verification technologies at the intersection of digital design and AI-driven innovation.
Role type
Working Student, Digital Functional Verification Engineer
Builds
Digital chips and verification frameworks
Domain
Semiconductor / Digital Design / Verification
Required skills
SystemVerilog, Verilog, Python, digital circuit design principles, debugging, scripting
Preferred skills
SystemVerilog UVM, SoC verification processes, EDA tools (simulators, waveform debug, lint, formal), AI-based verification methods
Technologies
SystemVerilog, UVM, Python, Verilog, EDA tools
Responsibilities
Research and evaluate state-of-the-art verification concepts including SystemVerilog UVM, functional verification, and formal verification; Support verification and automation tasks within ongoing projects; Explore AI-based methods and applications for functional and formal verification; Conduct research on how AI can improve verification efficiency, coverage, and analysis; Work closely with experienced verification engineers and contribute to real project work
Seniority
Student / Intern
