Principal Engineer Digital Design (f/m/div)
Core
Architecting and designing complex digital and mixed-signal blocks for automotive microcontroller IPs, focusing on system resources like clocking and reset.
Role type
Principal Engineer Digital Design (Automotive SoC)
Builds
Scalable, reusable IP blocks for automotive microcontrollers
Domain
Automotive semiconductor / Digital SoC design
Required skills
RTL coding (System Verilog, Verilog, VHDL), microarchitecture design, static timing analysis (STA), low-power design techniques, synthesis, ISO 26262 safety implementation, DFT
Preferred skills
Power/performance/area trade-off optimization, debug tools, simulation/emulation methodologies, infrastructure IP knowledge
Technologies
System Verilog, Verilog, VHDL, STA tools, DFT tools
Responsibilities
Architectural and concept development, design, and code in RTL; Conduct performance analysis in corner cases; Own microarchitecture design, specification, and maintenance; Perform static timing analysis and power/area/performance optimization; Collaborate with verification teams for block-level and system-level verification; Ensure designs comply with ISO 26262; Identify and resolve technical risks; Drive development of scalable, reusable IPs; Lead a design team and collaborate with cross-functional teams
Seniority
Principal, hands-on IC with leadership
