CareerPlan

Lead Principal Engineer - Digital Design

Bangalore BTPFull-time2026-10-14 → 2026-10-24

Core

Architecture, design, and delivery of complex digital IP, ASIC, and SoC solutions.

Role type

Lead Principal Engineer - Digital Design

Builds

High-quality silicon products (ASIC/SoC)

Domain

Semiconductor / Digital IC Design

Required skills

Verilog/System Verilog, RTL design, microarchitecture, PPA optimization, clocking and reset architectures, DFT, low-power design, timing closure, semiconductor productization processes

Preferred skills

Architecture definition, silicon bring-up, technical leadership, patent contribution

Technologies

Verilog, System Verilog, ASIC flows, SoC flows

Responsibilities

Lead architecture and RTL design of complex digital subsystems; Drive end-to-end design execution from concept to production; Make key technical decisions to optimize performance, power, area, and quality; Collaborate with verification, physical design, and software teams; Establish digital design methodologies and best practices; Lead technical reviews and root-cause analysis.

Seniority

Principal, hands-on IC with mentorship