Internship - Analog Mixed-Signal Design Verification Engineer
Core
Develop verification plans, behavioral models, and testbenches for analog and mixed-signal devices to ensure design intent coverage and robustness.
Role type
Analog Mixed-Signal Design Verification Intern
Builds
Mixed-signal verification flows and behavioral models for device-level and system-level behavior
Domain
Semiconductor / Analog Mixed-Signal Design
Required skills
Verilog-AMS, SystemVerilog, mixed-signal modeling, analog circuits fundamentals, simulation execution, corner analysis
Preferred skills
Python, MATLAB, Tcl, Cadence Virtuoso, Spectre, ADE Explorer/Assembler, vManager, Xcelium
Responsibilities
Develop verification plans per device specifications, generate and maintain behavioral models, develop testbenches and simulation environments, execute mixed-signal simulation flows, evaluate behavior under nominal and corner conditions
Seniority
Intern
