Senior FPGA Design Engineer (f/m/div)
Core
Convert full-chip microcontroller ASIC to FPGA, define design constraints, and debug RTL integration.
Role type
Senior IC FPGA design engineer (ASIC-to-FPGA conversion)
Builds
FPGA prototypes for ASIC validation
Domain
Semiconductor, Digital Design
Required skills
Digital Design, FPGA development, Verilog, VHDL, RTL conversion scripting, Hardware/Firmware debugging, Lab FPGA debug methodologies, Scripting (Perl, Python, TCL)
Preferred skills
Experience with Xilinx devices, C-language test firmware review
Technologies
Xilinx, ChipScope, Mentor Certus, Oscilloscopes, Protocol analyzers, Perl, Python, TCL
Responsibilities
Define and implement custom IP modules for FPGA tools, Write and verify test benches for FPGA integration, Develop RTL conversion scripts to automate ASIC RTL adaptation, Debug hardware/firmware co-execution challenges, Assist firmware team by reviewing and debugging C-language test firmware, Define coding rules for efficient RTL adaptation, Collaborate with global FPGA prototyping team to improve ASIC to FPGA prototyping flow
Seniority
Senior, hands-on IC