Principal Engineer Digital Design
Core
Implement DSP algorithms (Filtering, Error Correction, Echo Cancellation) in Verilog/System Verilog for automotive semiconductor applications.
Role type
Principal IC Digital Design Engineer
Builds
ASICs and FPGAs for automotive power systems, IoT, and mobility solutions
Domain
Automotive semiconductors / Digital Signal Processing
Required skills
RTL design (Verilog/System Verilog), DSP algorithm implementation, fixed-point math, PPA optimization, EDA tools, ASIC synthesis, timing closure
Preferred skills
MATLAB/Simulink/C/C++, FPGA/ASIC implementation experience, digital signal processing fundamentals
Technologies
Verilog, System Verilog, MATLAB, Simulink, C, C++, Synopsys Design Compiler, Cadence
Responsibilities
Implement DSP algorithms in HDL, collaborate on hardware architecture, translate MATLAB models to synthesizable code, conduct PPA analysis, create design documentation, perform linting/CDC checks, support synthesis and silicon debugging
Seniority
Principal, hands-on IC
