Senior Staff Engineer Pre-Silicon Verification AMS
No visa sponsorship
Core
Pre-silicon verification of Engineering and Production ICs using mixed-signal simulation and behavioral modeling.
Role type
Senior Staff Engineer Pre-Silicon Verification AMS
Builds
High-quality pre-silicon verification for Engineering and Production ICs
Domain
Semiconductor / Mixed-Signal Analog & Mixed-Signal (AMS)
Required skills
VerilogAMS, SystemVerilog, Cadence Virtuoso, Xcelium Suite, ADE Explorer, analog design techniques, mixed-signal simulation, debugging analog/digital domains, Python, C, C++, Unix/Linux shell
Preferred skills
DFT planning, ATE and Bench testability, schematic netlisting, version control, bug tracking
Technologies
Cadence Virtuoso, Xcelium, ADE Explorer, VerilogAMS, SystemVerilog, Python, C, C++
