STAGE – Etude de la capabilité des procédés de packaging avancé – F/H
Core
Characterize advanced packaging process steps, analyze metrology data, quantify process variability, and define robust industrial design rules for STMicroelectronics' silicon photonics, bipolar transistor, and CMOS imager technologies.
Role type
Intern, process integration and metrology
Builds
Advanced packaging assembly line for integrated photonics and CMOS technologies
Domain
Semiconductor manufacturing, process integration, metrology
Required skills
Semiconductor process flow knowledge, metrology and characterization techniques, statistical data analysis, experimental design (DOE), process parameter modeling, data synthesis and formalization
Preferred skills
Machine learning approaches for data analysis, advanced analytical methods
Technologies
Metrology tools, statistical analysis software, experimental design tools
Responsibilities
Characterize fabrication process steps on the advanced packaging line, analyze metrology and online control data, quantify process variability and identify dispersion sources, validate metrology patterns and placement on test structures, contribute to defining design rules for maximum yield, structure results into a reusable methodology, participate in technical exchanges with process, integration, metrology, and design teams
Seniority
Intern