VIE - Chine - Ingénieur R&D en technologies de packaging et d’assemblage H/F
Core
Integration, development, and improvement of assembly processes for a family of discrete power packages.
Role type
R&D packaging and assembly process engineer
Builds
Discrete power packages for the APMS group (Analog, Power & Discrete, MEMS and Sensors Group)
Domain
Semiconductor manufacturing / Power electronics
Required skills
Semiconductor assembly process knowledge, process integration, industrialization, continuous improvement, cost optimization, yield improvement, environmental qualification, patent filing, cross-functional collaboration
Preferred skills
Experience in semiconductor assembly, knowledge of packaging technologies
Technologies
Semiconductor packaging, assembly processes, materials qualification
Responsibilities
Integrate with local technical teams of subcontractors, coordinate development and industrialization activities, support development trials and continuous improvement actions, act as key liaison between ST and subcontractors, evolve existing assembly processes to optimize costs and yields, qualify environmentally friendly processes and materials, contribute to innovation through patents and collaboration with French and international labs
Seniority
Mid-level, hands-on IC
