Staff Photonics Design and Layout Engineer
Core
Design and layout block- and chip-scale photonic circuits from clean sheet concept to tapeout, verifying performance targets for AI data center infrastructure.
Role type
Staff IC photonics design and layout engineer
Builds
Integrated photonic solutions and chip-scale circuits for extreme-scale AI and HPC workloads
Domain
Semiconductor manufacturing / Silicon photonics / AI data center infrastructure
Deliverable
production ML models | product features
Required skills
Silicon photonics fundamentals, Python, script-based photonic circuit design (GDSFactory), photonic tapeout experience, analog/digital/packaging integration, PDK development, photonic simulation and verification
Preferred skills
Product-grade photonic tapeouts, foundry/custom PDKs, Cadence Virtuoso, photonic/analog circuit design
Technologies
GDSFactory, Cadence Virtuoso, Python
Responsibilities
Floorplan and layout block- and system-level photonic circuits; perform layout-driven photonic simulation and verification; develop and improve photonic layout, verification, and integration flows; contribute to proprietary PDK development; engage in problem solving for new photonic chip designs and architectures
Seniority
Staff, hands-on IC with strategic influence