Senior Engineer, RTL Design, AI Hardware
Core
Designing and optimizing micro-architectures for next-generation AI hardware silicon.
Role type
Senior RTL Design Engineer (AI Hardware)
Builds
Custom AI platform silicon and high-performance RISC-V CPU components
Domain
Semiconductor / AI Hardware / Digital Design
Deliverable
production ML models
Required skills
RTL development (Verilog/SystemVerilog), micro-architecture design, performance analysis, power/area/frequency optimization, simulation debugging, synthesis and timing analysis
Preferred skills
Experience with clock/reset logic, boot logic, debug logic, post-silicon debugging, internal tool development
Technologies
Verilog, SystemVerilog, RISC-V
Responsibilities
Implement and refine micro-architectural features, analyze performance bottlenecks, collaborate across RTL/DV/physical design teams, debug RTL issues in simulation and post-silicon environments
Seniority
Senior, hands-on IC
