Lead Emulation Engineer
Core
Lead deployment and execution of complex SoC/IP verification on hardware emulation platforms to accelerate functional verification, software development, and system-level debug.
Role type
Lead Emulation Engineer (IC)
Builds
Emulation environments and verification flows for large-scale ASIC/SoC designs
Domain
Semiconductor hardware design verification (ASIC/SoC)
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
ASIC/SoC emulation, Cadence Palladium, Synopsys ZeBu, RTL, digital design, SystemVerilog, Verilog, UVM, emulation compile/mapping/partitioning, Python, Tcl, Perl, C/C++ debugging
Preferred skills
Large complex SoCs, multi-IP environments, PCIe, UALink, CXL, Ethernet, NoC, memory systems, software-driven validation, custom transactors, performance benchmarking, pre-silicon/post-silicon debug
Technologies
Cadence Palladium, Synopsys ZeBu, SystemVerilog, Verilog, UVM, Python, Tcl, Perl, C/C++
