Principal Emulation Engineer
Core
Building and executing end-to-end emulation flows for complex semiconductor chips to validate AI infrastructure connectivity solutions.
Role type
Principal Emulation Engineer (Hardware Validation)
Builds
Silicon-accurate emulation models and validation flows for next-generation AI chips
Domain
Semiconductor hardware validation / AI infrastructure connectivity
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Emulation flow execution, RTL synthesis, SystemVerilog, high-scale chip emulation, system-level debugging, cross-functional hardware-software integration
Preferred skills
EDA tools (Lint, CDC, synthesis), Python/TCL scripting, standard debug environments (Verdi), high-speed interface protocols (PCIe, Ethernet, CXL, UALink), hardware-software co-verification
Technologies
Zebu, Palladium, Veloce, SystemVerilog, Python, TCL, Verdi, PCIe, Ethernet, CXL, UALink
Responsibilities
Execute end-to-end emulation flows from model generation to silicon-accurate debugging; Drive initial model bring-up and resolve complex bugs; Partner with Firmware, Software, and Validation teams for system-level scenarios; Optimize emulation strategies with Design and Verification teams
Seniority
Principal, hands-on IC
