CareerPlan

Test Design Engineer

San JoseFull-time2026-10-27 → 2026-11-06
On-site

Core

Own end-to-end test strategy and systems for AI hardware (chips, boards, servers, racks) from silicon bring-up through production.

Role type

Senior Test Design Engineer (Hardware/AI Infrastructure)

Builds

Test strategies, test systems, regression gating frameworks, and production validation procedures for inference workloads.

Domain

Hardware engineering, AI infrastructure, semiconductor validation

Deliverable

production ML models

Required skills

Test strategy definition, test system design, regression gating, hardware debugging, cross-domain failure triage, production validation planning

Preferred skills

Server/rack/GPU integration testing, BMC/BIOS/PCIe validation, hardware-in-the-loop systems, yield analysis, contract manufacturer collaboration

Technologies

Silicon, firmware, board-level hardware, server racks, high-speed interconnects, lab tools, CI/CD for hardware

Responsibilities

Define test coverage maps across silicon to rack levels; design test frameworks and versioning; review domain team test plans for gaps; build regression gating for firmware/drivers; define pass/fail criteria and diagnostics; lead cross-domain failure triage; optimize tests based on repeated failures; partner with manufacturing partners.

Seniority

Senior, hands-on IC