Staff Analogue Designer, CMOS Modelling
Core
Own full-chip mixed-signal CMOS modelling and behavioural model development for cryo-CMOS ASICS controlling quantum processors.
Role type
Staff IC analogue designer (CMOS modelling)
Builds
Behavioural models for full-chip simulation and verification of cryo-CMOS integrated circuits
Domain
Quantum computing hardware / Cryo-CMOS / Mixed-signal IC design
Deliverable
production ML models
Required skills
Full-chip modelling strategy, Verilog-A, Verilog-AMS, real-number modelling (SystemVerilog nettype/UDN), first-principles mathematics derivation, model-schematic correlation, mixed-signal co-simulation, mentorship
Preferred skills
Production tapeout flow experience, extreme-environment silicon (cryogenics/space), linear systems analysis, Z-parameter networks
Technologies
Verilog-A, Verilog-AMS, SystemVerilog, MATLAB, Python/NumPy, Cadence Virtuoso, Spectre, Xcelium, AMS Designer
Responsibilities
Define full-chip modelling strategy and sign-off criteria; Develop Verilog-A/AMS models for analogue blocks; Build real-number models for digital verification; Derive models from mathematical equations; Run model-versus-schematic correlation; Stand up mixed-signal co-simulation and regression; Mentor engineers on modelling craft
Seniority
Staff, hands-on IC with strategy & mentorship
