DMTS, DRAM Systems
Core
Lead architecture analysis for AI, cloud, and enterprise platforms, connecting DRAM device behavior to system-level performance and roadmap decisions.
Role type
Distinguished Member of Technical Staff (DMTS), Senior IC
Builds
Future DRAM, LPDDR, HBM, CXL, SSD, and disaggregated memory solutions
Domain
Semiconductor, Memory & Storage Systems
Deliverable
production ML models
Required skills
DRAM architecture, system modeling, electrical/thermal/power analysis, competitive assessment, AI/ML for engineering, quantitative analysis, technical leadership
Preferred skills
Volatile/non-volatile memory hierarchy, DRAM device topology, memory controller architecture, product planning
Technologies
DDR4/5, LPDDR5/5X/5T, HBM, CXL, SSD, JEDEC, CXL Consortium
Responsibilities
Analyze DRAM/LPDRAM components and circuit designs across competitive parts; Quantify tradeoffs in cost, power, latency, bandwidth, and reliability; Drive optimization across the full stack (OS, firmware, controllers); Mentor senior architects and engineers; Represent the company in standards bodies
Seniority
Distinguished Member of Technical Staff (DMTS), Principal, Strategy & Mentorship
