SR/STAFF ENGINEER, FECOS CPIE YE
Core
Lead strategic yield improvement initiatives across Micron's advanced memory portfolio (DRAM, NAND, HBM) by converting complex manufacturing challenges into scalable solutions and driving digital transformation of Yield Management Systems.
Role type
Senior IC Yield Enhancement Engineer (Semiconductor Manufacturing)
Builds
Scalable yield improvement programs, predictive modeling, and AI-enabled workflows for global manufacturing sites
Domain
Semiconductor manufacturing (Memory/Storage: DRAM, NAND, HBM)
Deliverable
production ML models
Required skills
Statistical analysis, root cause analysis, Model-Based Problem Solving (MBPS), Python, SQL, Yield3, JMP, cross-functional leadership, data-driven decision-making
Preferred skills
Artificial intelligence (AI), machine learning (ML), automation, advanced analytics, large-scale cross-site initiative leadership
Technologies
Yield3, JMP, Python, SQL, AI/ML platforms
Responsibilities
Lead strategic yield improvement programs across DRAM, NAND, and HBM technologies; Drive cross-fab yield benchmarking, performance analysis, and predictive modeling; Define, deploy, and sustain Yield Improvement (YE) Best Known Methods (BKMs) globally; Champion the digital transformation of Yield Management Systems (YMS) and Yield Enhancement workflows; Provide technical leadership and influence across Yield Enhancement, Process Integration Engineering, Process Engineering, Global Quality, Technology Development, and Manufacturing teams; Identify and implement innovative technologies, AI-enabled solutions, and data-driven approaches that improve engineering effectiveness.
Seniority
Senior/Staff, hands-on IC with strategic influence