Staff Engineer, ASIC Design Verification
Core
Develop advanced verification components for complex SOC designs, including simulation environments and test plans, ensuring on-time delivery with best-in-class quality.
Role type
Staff ASIC Design Verification Engineer
Builds
Production-ready verification environments and test benches for PCIe IP/sub-systems and SoC designs
Domain
Semiconductor / ASIC Design Verification
Required skills
PCIe IP/sub-systems expertise, UVM-based SV test-bench development, block/sub-system/SoC test plan definition, constrained random verification, functional coverage closure, ASIC simulation tools, debugging complex problems
Preferred skills
Self-starter mindset, analytical and problem-solving skills, verbal and written communication skills
Technologies
UVM, System Verilog, PCIe, ASIC simulation tools
