FY27 Intern - Digital Design Engineering Intern - Canada (16 months)
Core
Intern role focused on Digital Design Engineering, specifically RTL coding, DFT integration, and verification for custom SoCs and IPs.
Role type
Digital Design Engineering Intern
Builds
Custom System-on-Chip (SoC) and Chip-on-Wafer-on-Substrate (CoWoS) architectures
Domain
Semiconductor IC Design and Digital Test
Required skills
Digital design fundamentals, Verilog, VHDL, Perl, Python, TCL, DFT concepts, EDA test tools, C/C++, SystemVerilog
Responsibilities
Develop RTL code for DFT components, Integrate custom DFT logic for complex SoCs, Perform Scan, MBIST, and BSCAN insertion, Run ATPG and coverage analysis, Build verification testbenches, Review static timing analysis (STA) reports, Implement design automations
