CareerPlan

System Performance Architect

San Diego, California, United States of AmericaFull-time2026-10-23 → 2026-11-10

Core

Lead system performance explorations for next-generation Mobile, AI, and CPU server SoCs, driving architecture exploration from early concept through post-silicon.

Role type

Senior System Performance Architect

Builds

High performance, high quality, low power world class products (SoCs)

Domain

Semiconductor / System-on-Chip (SoC) Architecture

Deliverable

production ML models

Required skills

System-level performance analysis, Memory architecture, Interconnect/Caches/Compute optimization, Pre-silicon simulation, C++, SystemC/TLM modeling, Memory hierarchies, DRAM systems

Preferred skills

AI/ML/GPU/HPC-class SoC experience, Post-silicon performance analysis, Silicon correlation

Technologies

SystemC, TLM, C++, HBM, 3D-stacked memory

Responsibilities

Define and execute system level performance analysis of Infrastructure architecture features, memory controller behavior, and system-level trade-offs in pre-silicon simulation environment; Identify performance bottlenecks across interconnect, caches, and compute, and propose architecture improvements; Contribute to performance sign-off activities, project deliverables, technical reviews, and automation; Define methodologies, metrics, and KPI frameworks for workload analysis, performance tracking, and feature evaluation; Collaborate with cross-functional teams (SoC, NoC, memory controller, DV, power, software) to influence design decisions; Identify optimization opportunities across both hardware and software, and drive recommendations to architecture, design, compiler, OS, firmware, and application teams; Research and track industry trends and innovations in memory architecture such as HBM, 3D-stacked memory, and advanced packaging.