DSP Micro-Architect RTL Engineer
Core
Define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high performance, high quality, low power products.
Role type
ASIC Engineer (RTL/Architecture)
Builds
IP blocks and System-on-Chip (SoC) designs
Domain
Semiconductor / ASIC Design
Required skills
ASIC knowledge, RTL design, digital/analog design, architecture definition, system simulation, EDA tools, RTL to GDS flow, Virtuoso, technical documentation
Preferred skills
Master's degree in EE/CE/CS, architecture and design tools experience, scripting and programming languages, design verification methods
Technologies
Virtuoso, RTL to GDS Flow, EDA tools
Responsibilities
Assist in creation of architectures, circuit specifications, logic designs, and system simulations; Collaborate on implementation strategies; Support evaluation of process flow from high-level design to synthesis, place and route, and timing/power use; Write technical documentation for EDA/IP/ASIC projects
Seniority
Entry-level / Junior
