CareerPlan

Processor ASIC RTL Design Engineer

San Diego, California, United States of AmericaFull-time$101k–$152k2026-09-28 → 2026-11-10

Core

Define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for high performance, high quality, low power products.

Role type

ASIC RTL Design Engineer

Builds

IP blocks and System-on-Chip (SoC) components

Domain

Semiconductor / ASIC Design

Required skills

ASIC design, RTL design, digital/analog design, architecture definition, circuit specifications, logic design, system simulation, implementation strategy, RTL to GDS flow, Virtuoso, technical documentation

Preferred skills

Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science, experience with architecture and design tools, experience with scripting tools and programming languages, experience with design verification methods

Technologies

Virtuoso, RTL to GDS Flow

Responsibilities

Assist in the creation of architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements. Collaborate with team members to assist in the development of an implementation strategy that meets system requirements and customer needs. Support the evaluation of process flow from high-level design to synthesis, place and route, and timing and power use, and verification or similarly for custom circuit design/layout flow. Utilize tools/applications to execute and enable architecture and design of a specific part of a block/SoC or IC Package. Write technical documentation for EDA/IP/ASIC projects.

Seniority

Entry-level / Junior (Works under supervision)