Next-Gen, High-Speed HBM, LPDDR Memory Subsystem ASIC Digital Design Engineer (
Core
ASIC digital and analog design engineer for high-performance, low-power IP blocks and SoCs.
Role type
ASIC Digital Design Engineer
Builds
High-performance, high-quality, low-power IP blocks and SoCs
Domain
Semiconductors / ASIC Design
Required skills
RTL design, EDA tools, synthesis, place and route, timing analysis, power analysis, verification methods, scripting, technical documentation
Preferred skills
Master's degree in EE/CS, architecture design tools, scripting languages, design verification
Technologies
Virtuoso, RTL to GDS Flow
Responsibilities
Assist in defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP development; Create architectures, circuit specifications, logic designs, and system simulations; Collaborate on implementation strategies; Support evaluation of process flow from high-level design to synthesis, place and route, and timing/power use; Write technical documentation for EDA/IP/ASIC projects
Seniority
Junior, entry-level IC
