Sr. Staff Engineer – Power Lead, Systems Architecture
Core
Lead system-level power architecture, analysis, modeling, and optimization for complex SoCs and platforms, defining power states, islands, and trade-offs from concept to post-silicon.
Role type
Sr. Staff Systems Architect (Power Lead)
Builds
System-level power architecture, power budgets, and optimization strategies for SoCs and platforms.
Domain
Semiconductor / SoC Architecture / Power Management
Deliverable
production ML models
Required skills
SoC architecture, system power modeling, workload analysis, power-performance-thermal trade-off analysis, cross-IP power optimization, root-cause analysis, stakeholder leadership
Preferred skills
Power gating, DVFS, silicon telemetry, Python/shell automation, RTL/gate-level power inputs, PMIC/regulator knowledge
Technologies
Python, Shell, UPF, CPF, Linux, Android
Responsibilities
Lead system power architecture from concept to post-silicon; translate requirements into power architecture decisions; define power states and islands; develop power/performance models; drive cross-IP power optimization; correlate pre- and post-silicon measurements; communicate trade-offs to stakeholders.
Seniority
Sr. Staff, hands-on IC with strategic leadership
