FY27 Intern - Compute DSP/AI Processor Engineering Internship - Canada (16 months)
Core
Intern role in ASIC design and verification for Compute DSP/AI Processor hardware IP and subsystems.
Role type
Hardware Design and Verification Intern
Builds
ASIC HW IP blocks and sub-systems for machine learning end-user applications
Domain
Semiconductor / Hardware Engineering
Deliverable
production ML models
Required skills
Digital Logic, Digital Design, SystemVerilog, HLS C/C++, UVM, Python, C++, SystemC
Preferred skills
Computer architecture knowledge, ASIC design tool sets, Verification methodology, Scripting languages, Version control
Technologies
SystemVerilog, HLS C/C++, SystemC, UVM, Python, Perl, TCL, ClearCase, Git
Responsibilities
Implement modules in hardware design languages, Implement tests at module and sub-system levels, Integrate modules into larger subsystems, Implement reference and bus-functional models, Implement design/verification methodology and automation, Debug constraints for netlist synthesis and timing closure, Contribute to silicon debug and analysis, Perform power analysis and modelling
