Staff Engineer – SOC Design Verification
Core
Design and verify complex System-on-Chip (SoC) architectures, subsystems, and IP cores for next-generation mobile and compute products.
Role type
Staff IC SoC Design Verification Engineer
Builds
High-performance mobile and compute SoCs
Domain
Semiconductor / Hardware Engineering
Required skills
SoC design verification, System-Verilog, UVM, SVA, assertion development, testbench architecture, debugging, AXI/PCIe/USB protocols, RISC-V/ARM architectures, power-aware verification, Gate-Level Simulation (GLS), scripting (Python/TCL/Bash), waveform debugging
Preferred skills
DDR/multimedia subsystem verification, boot flow verification, NoC/Interconnect architectures, advanced simulation methodologies
Technologies
Verilog, System-Verilog, UVM, SVA, Verdi, Python, Perl, TCL, Bash, AXI, PCIe, USB, LPDDR, QUPSS, RISC-V, ARM
Responsibilities
Develop verification environments and testbenches from scratch at SoC, subsystem, and IP/core levels; perform assertion development, debugging, and root-cause analysis; create test plans and validate complex system-level challenges; collaborate with cross-functional teams to meet performance requirements.
Seniority
Staff, hands-on IC
