Data Center AI HW SPT BDC
Core
Lead voltage-plan development, silicon characterization, Vmin analysis, and power optimization for Data Center SoCs.
Role type
Senior IC hardware engineer (SoC power architecture)
Builds
Production-ready voltage plans and silicon characterization datasets for Data Center SoCs
Domain
Semiconductor hardware engineering, Data Center infrastructure
Required skills
SoC Power Architecture, Vmin Characterization, PMIC and Regulator Architecture, Silicon Bring-up and Validation, Statistical Data Analysis, Linux/Android Debugging, Data Center CPU/AI accelerator platforms, Power integrity, PDN analysis, Schematics and CRO usage, Semiconductor Technology, PVT Processes
Preferred skills
Python, SQL, Excel, Power BI
Technologies
Python, SQL, Excel, Power BI
Responsibilities
Lead voltage-plan development, silicon characterization, Vmin analysis, and power optimization activities; Work with PTE, SW, PMIC, Thermal, and Validation teams to define, characterize, validate, and release production-ready voltage plans; Analyze large silicon characterization datasets; Develop automation tools; Build dashboards for Vmin trends, voltage correlations, and silicon-health monitoring
Seniority
Senior, hands-on IC
