CareerPlan

ASICS Design Engineer, Senior Staff to Principal Level

Hsinchu City, TaiwanFull-time2026-10-19 → 2026-11-10

Core

Drive architecture definition and technical strategy for next-generation Ethernet switch ASICs, enabling scalable, high-performance networking solutions.

Role type

Senior Staff to Principal ASIC Architect (Networking)

Builds

Next-generation Ethernet switch ASICs and packet processing subsystems

Domain

Semiconductor / Networking / ASIC Design

Required skills

ASIC architecture, RTL coding, verification, synthesis, timing closure, physical design, Ethernet switch architecture, forwarding pipelines, traffic management, high-performance packet processing, SoC delivery, cross-functional leadership, system-level debugging

Preferred skills

Merchant silicon or switching ASIC experience (Broadcom/Marvell/Realtek/MTK)

Technologies

Ethernet, ASIC, RTL, SoC

Responsibilities

Define architecture and roadmap for Ethernet switching and packet processing subsystems, Lead design across multiple subsystems (forwarding engine, traffic management, scheduling, resource allocation), Drive cross-functional alignment with HW, SW, and Product teams, Lead performance analysis, modeling, and trade-off studies, Mentor senior technical leaders, Ensure successful execution from architecture through silicon delivery

Seniority

Senior Staff to Principal, hands-on IC with strategy & mentorship