CPU RTL Methodology Engineer
Core
Develop scalable CPU designs and automation tooling to streamline RTL development, verification, and debug workflows.
Role type
Senior IC CPU RTL Methodology Engineer
Builds
Scalable CPU designs, automation scripts, and CI/CD pipelines for RTL environments
Domain
Semiconductor hardware design (CPU microarchitecture)
Required skills
RTL design (Verilog/SystemVerilog), CPU microarchitecture knowledge, Python scripting, GIT/version control, CAD tools, CI/CD pipelines
Preferred skills
TCL, Perl, Bash scripting
Responsibilities
Define methodologies for scalable CPU designs, support RTL development and debug workflows, maintain RTL databases and repositories, triage RTL issues, develop automation scripts and tools, interface with CAD teams, contribute to CI/CD build systems
Seniority
Senior, hands-on IC
